Clock IC filters jitter from networking systems.

Designed to remove unwanted noise on any clock frequency from 1-710 MHz, pin-controlled Si5317 produces 2 ultra-low jitter output clocks at same frequency as input. Unit delivers jitter performance of 0.29 ps rms, optimizing BER and SNR in jitter-sensitive applications. Integrating single supply voltage regulator, IC eliminates need for multiple supply rails and discrete ferrite beads. On-chip ...

Sharapovas take on time

A TIMELESS and elegant union between ceramic and steel has been achieved in the Tag Heuer Formula 1 (THF1) Lady Steel and Ceramic Collection, the brands latest watch collection designed by tennis star Maria Sharapova.

5 Tips For Throwing Your 'Jersey Shore' Premiere Party!

It's more exciting than Christmas morning, more gratifying than the 8 Days of Hanukkah and more filling than Thanksgiving turkey dinner. Can you guess what we're referring to?

Touring Williamsburg

Colonial Williamsburg, Virginias top tourist attraction and the states second capital after Jamestown, is like entering a time portal to the colonial era.

Xilinx Improves Design Flow for Industry's Only Proven Partial Reconfiguration FPGA Technology with ISE Design Suite ...

Xilinx, Inc. today announced the availability of its fourth generation partial reconfiguration design flow and new improvements to its intelligent clock gating technology that deliver a 24 percent reduction in dynamic block-RAM power consumption in Virtex®-6 FPGA designs.